[roll] Roll fuchsia [kernel][arm64] hard set SCTLR_EL1 when initializing cpus instead of orring in bits

More and more bits are being added in newer versions of the ARM spec,
but they're all defaulting to a safe state if 0, so instead of orring in
the initial state of the cpu, hard set it to just the bits we need.

Also update the register definition for newer bits in the ARMv9 spec.

Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1154860
Original-Revision: f7bd57538e32d222b1eedc456bedcb5031502d75
GitOrigin-RevId: a6e5fbbc7baa6808b4cf7c5d73acf39f516c57be
Change-Id: I141d1e03659c75cb26d89358b5eef20e61366f86
1 file changed
tree: b3d2eef5a8e5817943a40bf3d7ba7600dff93f06
  1. ctf/
  2. git-hooks/
  3. infra/
  4. third_party/
  5. cts
  6. firmware
  7. flower
  8. jiri.lock
  9. MILESTONE
  10. minimal
  11. prebuilts
  12. README.md
  13. stem
  14. test_durations
  15. toolchain
README.md

Integration

This repository contains Fuchsia's Global Integration manifest files.

Making changes

All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.

Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance in one of the communication channels documented at get involved.

Obtaining the source

First install Jiri.

Next run:

$ jiri init
$ jiri import minimal https://fuchsia.googlesource.com/integration
$ jiri update

Third party

Third party projects should have their own subdirectory in ./third_party.