[roll] Roll fuchsia [perf_mon][x86] Support for Intel Goldmont CPUs

Add support for Intel Goldmont / Apollo Lake CPUs to perf_mon.
Intel Goldmont CPUs have a version 4 architectural PMU along
with well-documented non-architectural (model specific) per-core
and offcore counters. Intel Goldmont performance counter events
are fairly different than Intel 'big core' events; this will
provide a good model for support for Goldmont Plus / Tremont
cores and a 'shake out' Skylake-specifics in the existing
perf_mon system.

All perf_mon events require globally unique IDs; start Goldmont
IDs at 0x100; Intel Skylake core events start at 0x0.

1) Add support for fixed-function and architectural counters

2) Add support for a handful of non-architectural (model specific)
   performance counters, both so we can add the model-specific
   category and to provide a model of how to add non-architectural
   performance counters.

3) Also add basic-cpu.cpspec - an example cpspec file that
   uses only fixed-function and architectural performance counters,
   which should work on every Intel CPU with an architectural PMU.

Tested:
host$ fx set bringup.x64 --auto-dir \
  --with-base //bundles/bringup:tests \
  --with-base //garnet/bin/cpuperf
...
fuchsia$ cpuperf --spec-file=/boot/data/basic-cpu.cpspec
[00039.625] 03839:03841> arch_perfmon_start:1499: Enabling perfmon, 2 fixed, 4 programmable, 0 misc
[00040.625] 03839:03841> arch_perfmon_stop_locked:1646: Disabling perfmon
          | llc_misses|llc_references|instructions_retired|branch_instructions_retired|unhalted_reference_cycles|branch_misses_retired
Trace 0:  |      3,083|        45,121|           1,480,754|                    358,869|                7,784,244|                2,000
Trace 1:  |      5,285|        54,922|           1,816,260|                    436,853|                9,329,892|                2,931
Trace 2:  |      8,360|        43,048|           1,103,370|                    260,514|                5,699,616|                2,696
Trace 3:  |        384|         2,508|              81,077|                     19,765|                  444,834|                  135

Limitations:
* Only a handful of non-architectural events, not all required for
  TopDown analysis, were added
* No offcore events were added
* cpuperf list-event hardcodes "skylake" and does not list
  goldmont events.

Original-Bug: 33981 Fuchsia should run on Intel NUC6CAYH

Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/540121
Original-Revision: 5709cbdcc818475bd76f041aa535231fba11c5e4
GitOrigin-RevId: 7886df92f6a0a777277d911fd866bc5a25123d4e
Change-Id: Ieab6170a23f8665abed3c304c01c21dd521b8f3c
1 file changed
tree: c0850067f29f7d6266444db511db5796373425f2
  1. garnet/
  2. infra/
  3. peridot/
  4. third_party/
  5. topaz/
  6. zircon/
  7. firmware
  8. flower
  9. jiri.lock
  10. minimal
  11. prebuilts
  12. README.md
  13. stem
  14. test_durations
README.md

Integration

This repository contains Fuchsia's Global Integration manifest files.

Making changes

All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.

Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance via the IRC channel #fuchsia on Freenode.

Obtaining the source

First install Jiri.

Next run:

$ jiri init
$ jiri import minimal https://fuchsia.googlesource.com/integration
$ jiri update

Third party

Third party projects should have their own subdirectory in ./third_party.