)]}'
{
  "commit": "b3d1069ca405dc8c82a0eacef109d23c647b2e18",
  "tree": "8ded992ce3a173f158c0fc55382f5de0e79fecd1",
  "parents": [
    "b31b7dc79fd50a6a6724c2d436c1b155831492f6"
  ],
  "author": {
    "name": "Adrian Danis",
    "email": "adanis@fuchsia.infra.roller.google.com",
    "time": "Tue Mar 17 20:14:36 2026 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Tue Mar 17 20:15:35 2026 -0700"
  },
  "message": "[roll] Roll fuchsia [kernel][arm64] Use atomic_ref for PTE updates\n\nChanges existing reads/writes of volatile pointers to instead cast to\nan atomic_ref and perform a relaxed load/store. For the purposes of\nensuring the load and store actually happens correctly this is\nequivalent, but standardizing on atomic_ref will make it easier to\nreason about the correctness and absence of UB when moving to\nlock free algorithms.\n\nOriginal-Bug: 489545279\nOriginal-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1517278\nOriginal-Revision: 27436a2b3afb0b0602dc6a2a18e863c8f3a491f2\nGitOrigin-RevId: d0dd13ebc3ad4035f968abf6831750e800217124\nChange-Id: I033c61ab3a26a2f30a84ab7fa56e0740ed32d1e9\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4e383463d8d9ee8bc6744414c6959852413e35b7",
      "old_mode": 33188,
      "old_path": "stem",
      "new_id": "170220c3248af95d00bda743742cfc0f18fa5e7f",
      "new_mode": 33188,
      "new_path": "stem"
    }
  ]
}