[roll] Roll fuchsia [kernel][riscv] Wipe out any pending memory reservations on context switch

As mentioned in the atomic section of the RISC-V user spec, a kernel
should perform a SC based write to an un-aliased scratch variable during
context switch to clear any pending memory reservations that may have
been interrupted.

Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/973584
Original-Revision: 7aed93f3bc518670018cea754ccbab8726d8ea80
GitOrigin-RevId: bf6a3bbc78c604dfe261d71353d3d676d93f50b6
Change-Id: I8e20b31778722aa817a98e19eec4767d0562e212
1 file changed
tree: c1fd618fac3feb40d6b997d606512ee1db864c22
  1. git-hooks/
  2. infra/
  3. third_party/
  4. cts
  5. firmware
  6. flower
  7. jiri.lock
  8. MILESTONE
  9. minimal
  10. prebuilts
  11. README.md
  12. stem
  13. test_durations
  14. toolchain
README.md

Integration

This repository contains Fuchsia's Global Integration manifest files.

Making changes

All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.

Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance via the IRC channel #fuchsia on Freenode.

Obtaining the source

First install Jiri.

Next run:

$ jiri init
$ jiri import minimal https://fuchsia.googlesource.com/integration
$ jiri update

Third party

Third party projects should have their own subdirectory in ./third_party.