[roll] Roll fuchsia [intel-i915] Refactor CDCLK frequency setup code.

This change moves CDCLK (Core display clock) setup code to
a separate file (clock/cdclk.h, cdclk.cc) and added a common
interface for CDCLK for all platforms. This allows us to add
CDCLK frequency setup logic for other platforms (e.g. Tiger lake)
and use it in intel-i915 controller.

Original-Bug: 95863
Test: Refactor only. no-op.

Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/680309
Original-Revision: d4577d62b96d250f6308f1b8555b6f81bfca1fc9
GitOrigin-RevId: b8243afce65f7db118c892106ef45f4cab99ad7f
Change-Id: I19d2f1943106980b99fab49979b25e147cccb193
1 file changed
tree: 35aa9e945084176a1c6741189fb0b5779b427029
  1. infra/
  2. third_party/
  3. cts
  4. firmware
  5. flower
  6. fortune-teller
  7. jiri.lock
  8. minimal
  9. prebuilts
  10. README.md
  11. stem
  12. test_durations
  13. toolchain
README.md

Integration

This repository contains Fuchsia's Global Integration manifest files.

Making changes

All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.

Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance via the IRC channel #fuchsia on Freenode.

Obtaining the source

First install Jiri.

Next run:

$ jiri init
$ jiri import minimal https://fuchsia.googlesource.com/integration
$ jiri update

Third party

Third party projects should have their own subdirectory in ./third_party.