[roll] Roll fuchsia [xhci] Insert memory barriers

Ensure that data that we read from ERDP is always read after we check
its validity condition.

This fixes a bug that would occur when making the first pass through a
new segment. The code is ordered such that the completion code is
checked in AdvanceErdp before returning the control field, which is also
read from ERDP. The control field read could be reordered to come before
the completion code read, giving this sequence:
1. Read control field. Get zeroed data.
2. HW writes to ERDP setting completion code and other fields.
3. Read completion code, observe that it is not invalid.
4. Return the control field read at (1) with its cycle bit set to ccs_.
5. HandleIRQ processes the event TRB based on (1) seeing an invalid Type
   (since the data is zeroed) and silently ignoring the invalid TRB,
   causing a transfer event to be missed.

This meant that the list of pending TBRs was out of sync with the
hardware, which also failed silently, and eventually causing the driver
to unnecessarily flush out all pending TRBs (returning ZX_ERR_IO to
upstream drivers). At least one of those upstream drivers (the CDC
ethernet driver) would immediately requeue all of those requests, which
would trigger more transfer events that saw TRBs it didn't expect,
causing the xhci to flush pending TRBs again, effectively livelocking
the the CDC driver.

Original-Bug: 107934
Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/747286
Original-Revision: 2e744d4d43f392adfff937462b3d03fa5d0a641e
GitOrigin-RevId: 8b8e6c8b9c0e3de7564431a5758c1d0f5068cfdf
Change-Id: Ic14ad7857fcae7a8e390878836456cbbf9a9f3ae