[roll] Roll fuchsia [intel-i915-tgl] Add Dekel PLL for Type-C displays This adds registers to enable / disable Dekel PLL for Type-C ports, and the PLL manager for Tiger Lake. Currently only Type-C PLLs are supported. Original-Bug: 109368 Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/729333 Original-Revision: 77251080d314e94b8b0d47f5526661666409f9df GitOrigin-RevId: 0574fa796a96780dc39763d1aa0976413905dd8c Change-Id: I7b0e7324eb75a6b015fe969ca954de9d53477a30
This repository contains Fuchsia's Global Integration manifest files.
All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.
Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance via the IRC channel #fuchsia on Freenode.
First install Jiri.
Next run:
$ jiri init $ jiri import minimal https://fuchsia.googlesource.com/integration $ jiri update
Third party projects should have their own subdirectory in ./third_party.