| commit | 6cd4279e169ab40e87c08c6824861f2686b20602 | [log] [tgz] |
|---|---|---|
| author | Yilong Li <liyl@fuchsia.infra.roller.google.com> | Tue Feb 20 18:45:43 2024 +0000 |
| committer | Copybara-Service <copybara-worker@google.com> | Tue Feb 20 10:46:57 2024 -0800 |
| tree | 7c96ebae10727799897e1d363b72a527bfcf9a0c | |
| parent | 6d76c7654d35f27911025a6e71f4b1eaced8c4e7 [diff] |
[roll] Roll fuchsia [amlogic-display][panel] Fix some errors in BOE TV070WSM JD9365 initialization code. This change fixes: - The units in GIP signal width / phase registers (should be lines instead of pixels). - The meanings of values in GIP signal width / phase registers (a register value of 0 means the width / phase is 1 line). - The concept of CKV signal group to JD9365 initialization code. Though this is only mentioned in the JD9364 user guide, it's highly possible that the CKV signal definitions are the same. This change also does some style fixes by using "true / false" for 1-bit predicate fields. Test: no binary change. Original-Bug: 325547002 Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/993158 Original-Revision: a5741752216438b971b171195b225b882ef2ae23 GitOrigin-RevId: fe372b94c54d13ac27868220748bec0cab6f6c2c Change-Id: I096882762c45e6bf85306b757417a83bf0905bd3
This repository contains Fuchsia's Global Integration manifest files.
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