[roll] Roll fuchsia [fidl][powerlevel] Introduce fuchsia.hardware.powerlevel Typically the power level for a particular piece of hardware is configured by requesting a specific voltage to be supplied to that piece of hardware. In those cases fuchsia.hardware.vreg is a good choice of FIDL interface. Some hardware only provides an interface that permits the setting of an opaque power level. The specific voltages, currents, clock frequencies that this power level corresponds to is a property of the implementation. This FIDL interface provides a mechanism to set the power level for hardware that only provides an opaque power level as its interface. Original-Fixed: b/407095566 Test: Linked against a driver and built Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1238719 Original-Revision: 78e0b6b38bcf92e6daba593232afd686bfa23e48 GitOrigin-RevId: 8b339deb0ea0a8b0bd9f6e771888cbabd8272427 Change-Id: I5704c689fa8376e2ced95022e86846ccdfb9d2d4
This repository contains Fuchsia's Global Integration manifest files.
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First install Jiri.
Next run:
$ jiri init $ jiri import minimal https://fuchsia.googlesource.com/integration $ jiri update
Third party projects should have their own subdirectory in ./third_party.