[roll] Roll fuchsia [kernel][arm64] Add ARM exception handler for SError - Add a minimal exception handler for SError that counts occurrences and emits a trace duration when the kernel:irq category is enabled. - Set/clear the A bit in addition to I bit when enabling/disabling interrupts to prevent arbitrary nesting of IRQ and SError. - Unmask SError by default to enable handling incidental SErrors and avoid impacting low power idle. Original-Bug: 57651 Original-Bug: 96845 Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/510503 Original-Revision: 18c7ba9a82c704357282aaf35e8acd5967605c12 GitOrigin-RevId: e4cf1d355eb3ce6c9c462245b1c72a4248b0bd43 Change-Id: I6056ec412975366d6d4c39a7722f450c46528e37
This repository contains Fuchsia's Global Integration manifest files.
All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.
Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance via the IRC channel #fuchsia on Freenode.
First install Jiri.
Next run:
$ jiri init $ jiri import minimal https://fuchsia.googlesource.com/integration $ jiri update
Third party projects should have their own subdirectory in ./third_party.