| commit | 36a15b660b07dd8516620349324e69d652c8f39e | [log] [tgz] |
|---|---|---|
| author | Braden Kell <bradenkell@fuchsia.infra.roller.google.com> | Wed Aug 23 22:45:03 2023 +0000 |
| committer | Copybara-Service <copybara-worker@google.com> | Wed Aug 23 15:46:19 2023 -0700 |
| tree | 53bd9ee673422d3ed74569ad46bc989cdd502eb4 | |
| parent | db35de688f96b576666f2fc88dfc09214a689fa3 [diff] |
[roll] Roll fuchsia [clock][fidl] Add clock init metadata definition Define FIDL metadata for passing clock initialization steps from board drivers to the core clock driver. These init steps cover the clock impl calls affecting clock output, and the overall structure is based on the GPIO init metadata. Original-Bug: 130993 Test: CQ Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/889017 Original-Revision: a6e1ac6dfce52150eb6bbb8380b7ac4b2aab16cb GitOrigin-RevId: 85f83cec1c6910a5563768613a9bdb8bcd845e8a Change-Id: I583a5208380dbca15c6ffd03c33548944b09f494
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