[roll] Roll fuchsia [kernel] Add initial ticks offset to RISC-V This CL brings RISC-V in alignment with the other architectures by zeroing out the monotonic and boot timelines when we initialize the timer hardware. Mechanically, this means setting the ticks offset correctly on initialization. Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1254544 Original-Revision: b5a7010c500e0e5d320766ac7067afee29fe96d9 GitOrigin-RevId: 39f47a6094fae830c9bf182db3446608a750871a Change-Id: I2693dbff6bca54a65dfb1d19dd7e1d96ac9b7f78
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