[roll] Roll fuchsia [kernel][x86] Enable protecting (mark R/O, UC) physmap arena gaps

The Fuchsia physmap is constructed of 'arenas' of contiguous allocatable
physical pages; and of (potential) gaps between arenas, holding device
MMIOs, ACPI non-volatile structures, and other machine-specific details.

During boot, the Fuchsia kernel on arm64 marks the 'gaps' of the
physmap as read-only and uncacheable - this prevents inadvertent writes
via the physmap mapping and prevents various types of speculative
accesses or prefetches, which may have side-effects for R/O MMIOs.

Enable this on x86-64 as well; this converts the gaps from READ |
WRITE to READ | UNCACHEABLE. (on arm64, they are mapped READ | CACHEABLE
at boot).

The x86-64 SMBIOS access code would access structures in physmap gaps;
that code will now continue to work, but will use uncacheable accesses
to the SMBIOS table. That's ok - the accesses will still function, and the
only accesses to SMBIOS are r/o. (A prior version of this code
completely unmapped the gaps; that would not work here).

Original-Bug: 48018 Remove x86's direct dependencies on non-arena physmap memory
Original-Bug: 46799 MMIO regions should not be mapped cacheable
Original-Bug: 66874 Zircon kernel proactive security grab-bag

Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/464718
Original-Revision: baba6fb2cd1b46184048a0da6882f7a6003eeae5
GitOrigin-RevId: 30efe6d4c07fe57c36f25803f3aed875cfae1d21
Change-Id: I55662794ac717b4dd754edab27022db4fffe5681