|author||Todd Eisenberger <firstname.lastname@example.org>||Fri Feb 16 14:10:50 2018 -0800|
|committer||Venkatesh Srinivas <email@example.com>||Sat Aug 03 00:22:52 2019 +0000|
[kernel][x86] Implement shadow page tables [1/3] This patch implements maintaining shadow page table pairs to support page table isolation. It performs swapping between the two on all mode switches. Changes porting from original CR: 1. This patch doesn't compile, its just a forward-port of Todd's original patch, excluding changes to arch/x86/mmu.cpp 2. uspace_entry uses different registers. ZX-1528 #comment Implement PML4 shadowing and swapping ZX-1526 Implement shadow page tables [2/3] 1. Merge remaining parts of mmu.cpp change that were skipped in d15ce06d 2. Extract KPTI constants into a private header; we don't need or want to make the x86 aspace code depend on lib/code_patching publically. 3. Minor build fixes 4. Switch X86PageTableBase::Init() -> virtual; we expect each type of page table implementation to override it. 5. Disable multi-page page table allocation; we are going to replace it, as contiguous allocations at runtime are disfavored. ZX-1528 #comment Implement PML4 shadowing and swapping ZX-1526 Tested: * Builds, but does not boot (as expected) Change-Id: I3befc3ee82707baf77a921e3062c5f44a12427c0
Pink + Purple == Fuchsia (a new operating system)
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