fi-0162: Wrong number of layout parameters {:#fi-0162}

Certain FIDL layouts, like vector and array, take parameters. This error indicates that the highlighted type has an incorrect number of parameters specified:

{% include “docs/reference/fidl/language/error-catalog/label/_bad.md” %}

{% includecode gerrit_repo="fuchsia/fuchsia" gerrit_path="tools/fidl/fidlc/tests/fidl/bad/fi-0162-a.test.fidl" exclude_regexp="\/\/ (Copyright 20|Use of|found in).*" %}

It can also appear in cases where a non-parameterizable type has erroneously had parameters attached to it:

{% include “docs/reference/fidl/language/error-catalog/label/_bad.md” %}

{% includecode gerrit_repo="fuchsia/fuchsia" gerrit_path="tools/fidl/fidlc/tests/fidl/bad/fi-0162-b.test.fidl" exclude_regexp="\/\/ (Copyright 20|Use of|found in).*" %}

The fix is always to specify the correct number of parameters for the layout in question:

{% include “docs/reference/fidl/language/error-catalog/label/_good.md” %}

{% includecode gerrit_repo="fuchsia/fuchsia" gerrit_path="tools/fidl/fidlc/tests/fidl/good/fi-0162.test.fidl" exclude_regexp="\/\/ (Copyright 20|Use of|found in).*" %}

The only parameterized types in FIDL are array<T, N>, box<T>, and vector<T>. The client_end and server_end types used to be parameterized in an older version of the FIDL syntax, but this is no longer the case, though it is a frequent source of run-ins with this error. These two types now take their protocol specification as a (required) constraint instead.

Parameters, which are always listed inside of angle brackets <...>, have some similarities to constraints, which appear after the :... character at the end of the type. For example, at first blush, it may appear odd that array<T, N> specifies its size as a parameter, while vector<T>:N specifies its size as a constraint. The difference is that parameters always affect the wire layout shape of the type in question, while constraints merely alter the set of values that are considered acceptable at encode/decode time for that type, with no effect on wire layout.

See RFC-0050: FIDL Syntax Revamp for a more thorough discussion of the distinction between the two concepts.