src/devices/bind/fuchsia.pci/fuchsia.pci.bind

// Copyright 2019 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

library fuchsia.pci;

extend uint fuchsia.BIND_PROTOCOL {
  DEVICE = 31,
};

extend uint fuchsia.BIND_PCI_VID {
  AMD = 0x1002,
  REALTEK = 0x10ec,
  NVIDIA = 0x10de,
  VIRTIO = 0x1af4,
  BROADCOM = 0x14e4,
  ATHEROS = 0x168c,
  INTEL = 0x8086,
};

extend uint fuchsia.BIND_PCI_DID {
  VIRTIO_DEV_TYPE_NETWORK = 0x1041,
  VIRTIO_DEV_TYPE_BLOCK = 0x1042,
  VIRTIO_DEV_TYPE_BALLOON = 0x1053,
  VIRTIO_DEV_TYPE_CONSOLE = 0x1043,
  VIRTIO_DEV_TYPE_SCSI = 0x1048,
  VIRTIO_DEV_TYPE_ENTROPY = 0x1044,
  VIRTIO_DEV_TYPE_GPU = 0x1056,
  VIRTIO_DEV_TYPE_INPUT = 0x1058,
  VIRTIO_DEV_TYPE_SOCKET = 0x1059,
  VIRTIO_DEV_TYPE_T_NETWORK = 0x1000,
  VIRTIO_DEV_TYPE_T_BLOCK = 0x1001,
  VIRTIO_DEV_TYPE_T_BALLOON = 0x1002,
  VIRTIO_DEV_TYPE_T_CONSOLE = 0x1003,
  VIRTIO_DEV_TYPE_T_SCSI_HOST = 0x1004,
  VIRTIO_DEV_TYPE_T_ENTROPY = 0x1005,
  VIRTIO_DEV_TYPE_T_9P = 0x1009,
  RTL8111 = 0x8168,
};

extend uint fuchsia.BIND_PCI_CLASS {
  UNCLASSIFIED = 0x00,
  MASS_STORAGE = 0x01,
  NETWORK = 0x02,
  DISPLAY = 0x03,
  MULTIMEDIA = 0x04,
  MEMORY_CONTROLLER = 0x05,
  BRIDGE = 0x06,
  COMMUNICATION_CONTROLLER = 0x07,
  GENERIC_SYSTEM_PERIPHERAL = 0x08,
  INPUT_DEVICE_CONTROLLER = 0x09,
  DOCKING_STATION = 0x0a,
  PROCESSOR = 0x0b,
  SERIAL_BUS_CONTROLLER = 0x0c,
  WIRELESS_CONTROLLER = 0x0d,
  INTELLIGENT_CONTROLLER = 0x0e,
  SATELLITE_COMMUNICATIONS_CONTROLLER = 0x0f,
  ENCRYPTION_CONTROLLER = 0x10,
  SIGNAL_PROCESSING_CONTROLLER = 0x11,
  PROCESSING_ACCELERATORS = 0x12,
  NONESSENTIAL_INSTRUMENTATION = 0x13,
  COPROCESSOR = 0x40,
  UNASSIGNED = 0xff,
};