# Copyright 2018 The Fuchsia Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be found in the LICENSE file.
#
# WARNING: This file is machine generated by fidlgen.

include <fidl/test/experimentalmaybefromtypealias/c/fidl.h>
fidl_test_experimentalmaybefromtypealias_TestingInLine {
       u1 int64
       u2InLine fidl_vector
       u3InLine array[int64, 1]
       u4InLine fidl_vector
       u5InLine fidl_vector
       u6InLine array[fidl_vector, 4]
       u7InLine array[array[int64, 1], 4]
       v1InLine fidl_vector
       v2InLine fidl_vector
       v3InLine array[fidl_vector, 4]
       a1InLine array[int64, 1]
       a2InLine fidl_vector
       a3InLine array[array[int64, 1], 4]
       p1 flags[fidl_handle_presence, int32]
       p2InLine fidl_vector
       p3InLine array[flags[fidl_handle_presence, int32], 4]
       r1 flags[fidl_handle_presence, int32]
       r2InLine fidl_vector
       r3InLine array[flags[fidl_handle_presence, int32], 4]
       b1InLine fidl_vector
       b2InLine fidl_vector
       b3InLine array[fidl_vector, 4]
       s1InLine fidl_string
       s2InLine fidl_vector
       s3InLine array[fidl_string, 4]
       vv1InLine fidl_vector
       vv2InLine fidl_vector
       vv3InLine array[fidl_vector, 3]
       aa1InLine array[int64, 2]
       aa2InLine fidl_vector
       aa3InLine array[array[int64, 2], 3]
       rr1 flags[fidl_handle_presence, int32]
       rr2InLine fidl_vector
       rr3InLine array[flags[fidl_handle_presence, int32], 3]
} [packed]
fidl_test_experimentalmaybefromtypealias_TestingOutOfLine {
       u2OutOfLine array[int64]
       u4OutOfLine parallel_array[fidl_vector, array[int64]]
       u5OutOfLine array[array[int64, 1]]
       u6OutOfLine array[array[int64], 4]
       v1OutOfLine array[int64]
       v2OutOfLine parallel_array[fidl_vector, array[int64]]
       v3OutOfLine array[array[int64], 4]
       a2OutOfLine array[array[int64, 1]]
       p2OutOfLine array[flags[fidl_handle_presence, int32]]
       r2OutOfLine array[flags[fidl_handle_presence, int32]]
       b1OutOfLine array[int8]
       b2OutOfLine parallel_array[fidl_vector, array[int8]]
       b3OutOfLine array[array[int8], 4]
       s1OutOfLine fidl_aligned[stringnoz]
       s2OutOfLine parallel_array[fidl_string, fidl_aligned[stringnoz]]
       s3OutOfLine array[fidl_aligned[stringnoz], 4]
       vv1OutOfLine array[int64]
       vv2OutOfLine parallel_array[fidl_vector, array[int64]]
       vv3OutOfLine array[array[int64], 3]
       aa2OutOfLine array[array[int64, 2]]
       rr2OutOfLine array[flags[fidl_handle_presence, int32]]
} [packed]
fidl_test_experimentalmaybefromtypealias_TestingHandles {
       p1 zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server
       p2 array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server]
       p3Handles array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server, 4]
       r1 zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server
       r2 array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server]
       r3Handles array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server, 4]
       rr1 zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server
       rr2 array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server]
       rr3Handles array[zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server, 3]
} [packed]


resource zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_client[zx_chan]
resource zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server[zx_chan]

zx_channel_create$fidl_test_experimentalmaybefromtypealias_MyProtocol(options const[0], out0 ptr[out, zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_client], out1 ptr[out, zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server])
fdio_service_connect$fidl_test_experimentalmaybefromtypealias_MyProtocol(path ptr[in, string["/svc/"]], handle zx_chan_fidl_test_experimentalmaybefromtypealias_MyProtocol_server)