sdk/fidl/fuchsia.hardware.vreg/metadata.fidl

// Copyright 2021 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
library fuchsia.hardware.vreg;

type PwmVregMetadataEntry = table {
    /// PWM index corresponding to the voltage regulator. Should correspond to id in pwm_id_t
    /// defined in //src/lib/ddk/include/ddk/metadata/pwm.h
    1: pwm_index uint32;

    /// PWM period in nanoseconds.
    2: period_ns uint32;

    /// Minimum voltage of voltage regulator in microvolts.
    3: min_voltage_uv uint32;

    /// Size of a voltage step in microvolts.
    4: voltage_step_uv uint32;

    /// Number of voltage steps. For example, voltage regulator with voltage range 400 uV- 1000 uV
    /// inclusive and step size 20 uV. Total number of steps is (1000 uV - 400 uV) / 20 uV + 1 = 31
    /// steps.
    5: num_steps uint32;
};

type Metadata = table {
    /// Vector of PWM Vreg metadata. One for each PWM voltage regulator.
    1: pwm_vreg vector<PwmVregMetadataEntry>:MAX;
};