src/devices/internal/drivers/fragment/fragment-proxy.h

// Copyright 2019 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#ifndef SRC_DEVICES_INTERNAL_DRIVERS_FRAGMENT_FRAGMENT_PROXY_H_
#define SRC_DEVICES_INTERNAL_DRIVERS_FRAGMENT_FRAGMENT_PROXY_H_

#include <fuchsia/hardware/amlogiccanvas/cpp/banjo.h>
#include <fuchsia/hardware/audio/cpp/banjo.h>
#include <fuchsia/hardware/clock/cpp/banjo.h>
#include <fuchsia/hardware/dsi/cpp/banjo.h>
#include <fuchsia/hardware/ethernet/board/cpp/banjo.h>
#include <fuchsia/hardware/gpio/cpp/banjo.h>
#include <fuchsia/hardware/hdmi/cpp/banjo.h>
#include <fuchsia/hardware/i2c/cpp/banjo.h>
#include <fuchsia/hardware/platform/device/cpp/banjo.h>
#include <fuchsia/hardware/power/cpp/banjo.h>
#include <fuchsia/hardware/power/sensor/cpp/banjo.h>
#include <fuchsia/hardware/pwm/cpp/banjo.h>
#include <fuchsia/hardware/registers/cpp/banjo.h>
#include <fuchsia/hardware/spi/cpp/banjo.h>
#include <fuchsia/hardware/sysmem/cpp/banjo.h>
#include <fuchsia/hardware/tee/cpp/banjo.h>
#include <fuchsia/hardware/usb/modeswitch/cpp/banjo.h>
#include <fuchsia/hardware/vreg/cpp/banjo.h>
#include <lib/ddk/debug.h>
#include <lib/ddk/device.h>
#include <lib/ddk/driver.h>
#include <lib/zx/channel.h>

#include <ddktl/device.h>

#include "proxy-protocol.h"
#include "src/devices/bus/drivers/pci/proxy.h"

namespace fragment {

class FragmentProxy;
using FragmentProxyBase = ddk::Device<FragmentProxy, ddk::GetProtocolable>;

class FragmentProxy : public FragmentProxyBase,
                      public ddk::AmlogicCanvasProtocol<FragmentProxy>,
                      public ddk::ClockProtocol<FragmentProxy>,
                      public ddk::EthBoardProtocol<FragmentProxy>,
                      public ddk::GpioProtocol<FragmentProxy>,
                      public ddk::HdmiProtocol<FragmentProxy>,
                      public ddk::I2cProtocol<FragmentProxy>,
                      public ddk::CodecProtocol<FragmentProxy>,
                      public ddk::DaiProtocol<FragmentProxy>,
                      public ddk::PDevProtocol<FragmentProxy>,
                      public ddk::PowerProtocol<FragmentProxy>,
                      public ddk::PwmProtocol<FragmentProxy>,
                      public ddk::RegistersProtocol<FragmentProxy>,
                      public ddk::SpiProtocol<FragmentProxy>,
                      public ddk::SysmemProtocol<FragmentProxy>,
                      public ddk::TeeProtocol<FragmentProxy>,
                      public ddk::UsbModeSwitchProtocol<FragmentProxy>,
                      public ddk::VregProtocol<FragmentProxy>,
                      public ddk::DsiProtocol<FragmentProxy>,
                      // TODO(fxbug.dev/32978): PciProxyBase implements
                      // ddk::PciProtocol so it can be shared between the two
                      // PCI drivers until migration is complete.
                      public ddk::PciProtocol<FragmentProxy>,
                      public ddk::PowerSensorProtocol<FragmentProxy> {
 public:
  FragmentProxy(zx_device_t* parent, zx::channel rpc)
      : FragmentProxyBase(parent), rpc_(std::move(rpc)) {}

  static zx_status_t Create(void* ctx, zx_device_t* parent, const char* name, const char* args,
                            zx_handle_t raw_rpc);

  zx_status_t DdkGetProtocol(uint32_t, void*);
  void DdkRelease();

  zx_status_t Rpc(const ProxyRequest* req, size_t req_length, ProxyResponse* resp,
                  size_t resp_length, const zx_handle_t* in_handles, size_t in_handle_count,
                  zx_handle_t* out_handles, size_t out_handle_count, size_t* out_actual);

  zx_status_t Rpc(const ProxyRequest* req, size_t req_length, ProxyResponse* resp,
                  size_t resp_length) {
    return Rpc(req, req_length, resp, resp_length, nullptr, 0, nullptr, 0, nullptr);
  }

  void AcpiConnectServer(zx::channel server);

  zx_status_t AmlogicCanvasConfig(zx::vmo vmo, size_t offset, const canvas_info_t* info,
                                  uint8_t* out_canvas_idx);
  zx_status_t AmlogicCanvasFree(uint8_t canvas_idx);
  zx_status_t ClockEnable();
  zx_status_t ClockDisable();
  zx_status_t ClockIsEnabled(bool* out_enabled);
  zx_status_t ClockSetRate(uint64_t hz);
  zx_status_t ClockQuerySupportedRate(uint64_t max_rate, uint64_t* out_max_supported_rate);
  zx_status_t ClockGetRate(uint64_t* out_current_rate);
  zx_status_t ClockSetInput(uint32_t idx);
  zx_status_t ClockGetNumInputs(uint32_t* out_num_inputs);
  zx_status_t ClockGetInput(uint32_t* out_current_input);
  zx_status_t EthBoardResetPhy();
  zx_status_t GpioConfigIn(uint32_t flags);
  zx_status_t GpioConfigOut(uint8_t initial_value);
  zx_status_t GpioSetAltFunction(uint64_t function);
  zx_status_t GpioRead(uint8_t* out_value);
  zx_status_t GpioWrite(uint8_t value);
  zx_status_t GpioGetInterrupt(uint32_t flags, zx::interrupt* out_irq);
  zx_status_t GpioReleaseInterrupt();
  zx_status_t GpioSetPolarity(gpio_polarity_t polarity);
  zx_status_t GpioSetDriveStrength(uint64_t ds_ua, uint64_t* out_actual_ds_ua);
  zx_status_t GpioGetDriveStrength(uint64_t* ds_ua);
  void HdmiConnect(zx::channel chan);
  void I2cTransact(const i2c_op_t* op_list, size_t op_count, i2c_transact_callback callback,
                   void* cookie);
  zx_status_t I2cGetMaxTransferSize(size_t* out_size);
  zx_status_t PDevGetMmio(uint32_t index, pdev_mmio_t* out_mmio);
  zx_status_t PDevGetInterrupt(uint32_t index, uint32_t flags, zx::interrupt* out_irq);
  zx_status_t PDevGetBti(uint32_t index, zx::bti* out_bti);
  zx_status_t PDevGetSmc(uint32_t index, zx::resource* out_smc);
  zx_status_t PDevGetDeviceInfo(pdev_device_info_t* out_info);
  zx_status_t PDevGetBoardInfo(pdev_board_info_t* out_info);
  zx_status_t PDevDeviceAdd(uint32_t index, const device_add_args_t* args,
                            zx_device_t** out_device);
  zx_status_t PDevGetProtocol(uint32_t proto_id, uint32_t index, void* out_out_protocol_buffer,
                              size_t out_protocol_size, size_t* out_out_protocol_actual);
  zx_status_t PowerRegisterPowerDomain(uint32_t min_needed_voltage, uint32_t max_supported_voltage);
  zx_status_t PowerUnregisterPowerDomain();
  zx_status_t PowerGetPowerDomainStatus(power_domain_status_t* out_status);
  zx_status_t PowerGetSupportedVoltageRange(uint32_t* min_voltage, uint32_t* max_voltage);
  zx_status_t PowerRequestVoltage(uint32_t _voltage, uint32_t* actual_voltage);
  zx_status_t PowerGetCurrentVoltage(uint32_t index, uint32_t* current_voltage);
  zx_status_t PowerWritePmicCtrlReg(uint32_t reg_addr, uint32_t value);
  zx_status_t PowerReadPmicCtrlReg(uint32_t reg_addr, uint32_t* out_value);
  zx_status_t PwmGetConfig(pwm_config_t* out_config);
  zx_status_t PwmSetConfig(const pwm_config_t* config);
  zx_status_t PwmEnable();
  zx_status_t PwmDisable();
  void RegistersConnect(zx::channel chan);
  zx_status_t SpiTransmit(const uint8_t* txdata_list, size_t txdata_count);
  zx_status_t SpiReceive(uint32_t size, uint8_t* out_rxdata_list, size_t rxdata_count,
                         size_t* out_rxdata_actual);
  zx_status_t SpiExchange(const uint8_t* txdata_list, size_t txdata_count, uint8_t* out_rxdata_list,
                          size_t rxdata_count, size_t* out_rxdata_actual);
  void SpiConnectServer(zx::channel server);
  zx_status_t SysmemConnect(zx::channel allocator2_request);
  zx_status_t SysmemRegisterHeap(uint64_t heap, zx::channel heap_connection);
  zx_status_t SysmemRegisterSecureMem(zx::channel tee_connection);
  zx_status_t SysmemUnregisterSecureMem();
  zx_status_t TeeConnectToApplication(const uuid_t* application_uuid, zx::channel tee_app_request,
                                      zx::channel service_provider);
  zx_status_t VregSetVoltageStep(uint32_t step);
  uint32_t VregGetVoltageStep();
  void VregGetRegulatorParams(vreg_params_t* out_params);

  // USB Mode Switch
  zx_status_t UsbModeSwitchSetMode(usb_mode_t mode);

  // DSI
  zx_status_t DsiConnect(zx::channel server);

  zx_status_t CodecConnect(zx::channel chan);
  zx_status_t DaiConnect(zx::channel chan);

  // PCI
  zx_status_t PciGetBar(uint32_t bar_id, pci_bar_t* out_res);
  zx_status_t PciSetBusMastering(bool enable);
  zx_status_t PciResetDevice();
  zx_status_t PciAckInterrupt();
  zx_status_t PciMapInterrupt(uint32_t which_irq, zx::interrupt* out_handle);
  zx_status_t PciConfigureInterruptMode(uint32_t requested_irq_count, pci_interrupt_mode_t* mode);
  void PciGetInterruptModes(pci_interrupt_modes_t* out_modes);
  zx_status_t PciSetInterruptMode(pci_interrupt_mode_t mode, uint32_t requested_irq_count);
  zx_status_t PciGetDeviceInfo(pci_device_info_t* out_into);
  zx_status_t PciReadConfig8(uint16_t offset, uint8_t* out_value);
  zx_status_t PciReadConfig16(uint16_t offset, uint16_t* out_value);
  zx_status_t PciReadConfig32(uint16_t offset, uint32_t* out_value);
  zx_status_t PciWriteConfig8(uint16_t offset, uint8_t value);
  zx_status_t PciWriteConfig16(uint16_t offset, uint16_t value);
  zx_status_t PciWriteConfig32(uint16_t offset, uint32_t value);
  zx_status_t PciGetFirstCapability(uint8_t cap_id, uint8_t* out_offset);
  zx_status_t PciGetNextCapability(uint8_t cap_id, uint8_t offset, uint8_t* out_offset);
  zx_status_t PciGetFirstExtendedCapability(uint16_t cap_id, uint16_t* out_offset);
  zx_status_t PciGetNextExtendedCapability(uint16_t cap_id, uint16_t offset, uint16_t* out_offset);
  zx_status_t PciGetBti(uint32_t index, zx::bti* out_bti);

  // Power sensor
  zx_status_t PowerSensorConnectServer(zx::channel server);

 private:
  zx::channel rpc_;
  // Helpers to marshal PCI config-based RPC.
  zx_status_t PciRpc(pci::PciRpcOp op, zx_handle_t* rd_handle, const zx_handle_t* wr_handle,
                     PciRpcRequest* req, PciRpcResponse* resp);
  template <typename T>
  zx_status_t PciReadConfig(uint16_t offset, T* out_value);
  template <typename T>
  zx_status_t PciWriteConfig(uint16_t offset, T value);
};

}  // namespace fragment

#endif  // SRC_DEVICES_INTERNAL_DRIVERS_FRAGMENT_FRAGMENT_PROXY_H_